Setup Time:
It is time required for data to be available at input of sequence device before clock edge captures the data in device.
Hold Time:
It is time required for data to be available at input of sequence device after the clock edge captures the data in device.
- For better understanding of Setup and Hold Time here an example of D-FF is presented. As shown in figure, red box shows the data which must be stable in those areas i.e before and after the active edge of clock respectively for setup and hold time. If data input doesn't remain constant (in this period of time) the setup and hold violation occurs in the circuits.
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| Figure: Understanding of Setup & hold time. |
