Blockages
Blockages are specified locations where placing cells are prevented or blocked. These act as guidelines for placing standard cell* in the design. Blockages will not be guiding the placement tool to place standard cell at some particular area, but it won't allow placement tool to place standard cell at specified locations. This way blockages are act as guidelines to placement tool.
*Standard cell: A standard cell is a group of transistors and interconnects structures that provides a boolean logic function (e.g. AND, OR, XOR, XNOR, NOT) or a storage function (flipflops or latch).
Types of blockages describes as below,
Soft (Non-buffer) blockage:
Soft blockage specifies a region where only buffer can be placed. That means standard cells cannot be placed in this region. It blocks(prevents) the placement tool from placing non-buffer cells such as std. cell in this region.
