Libraries & Incoming Files
ØTypical
set of libraries received from the library vendor:
§LEF: Abstract Physical View
§LIB: Timing view
§GDS: Full layout view
§Verilog stub files/models etc.
ØRules
files received from Foundry
§RC Extraction
§Noise characterization files
§Design rule documents for the
corresponding technology
§DRC/ Antenna, LVS deck for the
corresponding verification tool,
Incoming Files/ Information
ØSet of files/ info to be received from
the Front-end design group
§Netlist
§Timing Constraints file - SDC constraints
§Data Flow diagram, expected aspect ratio,
die size
§Pin-pad table - as Excel sheet/ text
table (including power pads)
§Clock constraints - max skew, max and min
insertion delay, no. of clock domains, clock start points (whether port level
or internally generated)
§Reports - timing report, power estimation
report, area report.
