Showing posts with label Floorplanning. Show all posts
Showing posts with label Floorplanning. Show all posts

24 March 2015

Floorplanning

What is Floorplanning????

A floorplanning is the process of placing blocks/macros in the chip/core area,
thereby determining the routing areas between them.
Floorplan determines the size of die and creates wire tracks for placement of standard cells. It 
creates power ground(PG) connections. It also determines the I/O pin/pad placement
information.

A good floorplanning should meet the following constrains.
Minimize the total chip area,
Make routing phase easy (routable),
Improve the performance by reducing signal delays.

Floorplanning